Commit cd1e0c4

Nick committed on
now assembly free!
commit cd1e0c4e767ca4b269ff83a7ad1499f2e88d6d49 parent abd683a
3 changed files +0−29
ModifiedCpu/machine.pas +0−24
@@ -8,7 +8,6 @@
8 unit machine; 8 unit machine;
9 9
10 {$MODE Delphi} 10 {$MODE Delphi}
11 {$ASMMODE INTEL}
12 11
13 interface 12 interface
14 13
@@ -192,9 +191,6 @@ begin
192 else 191 else
193 res := byte(PChar(cart)[address + addr_bank]); 192 res := byte(PChar(cart)[address + addr_bank]);
194 193
195 asm
196 MOV AL,res;
197 end;
198 Result := res; 194 Result := res;
199 exit; 195 exit;
200 // Problem mit cdecl, keine Registerübergabe !! 196 // Problem mit cdecl, keine Registerübergabe !!
@@ -208,9 +204,6 @@ begin
208 if (m_iram[$ff4f] and 1 > 0) and (address >= $8000) and (address < $a000) then 204 if (m_iram[$ff4f] and 1 > 0) and (address >= $8000) and (address < $a000) then
209 begin 205 begin
210 res := m_iram2[address]; 206 res := m_iram2[address];
211 asm
212 MOV AL,res;
213 end;
214 Result := res; 207 Result := res;
215 exit; 208 exit;
216 end; 209 end;
@@ -220,9 +213,6 @@ begin
220 if cr = 0 then 213 if cr = 0 then
221 cr := 1; 214 cr := 1;
222 res := m_cgbram[4096 * cr + address - $d000]; 215 res := m_cgbram[4096 * cr + address - $d000];
223 asm
224 MOV AL,res;
225 end;
226 Result := res; 216 Result := res;
227 exit; 217 exit;
228 end; 218 end;
@@ -234,25 +224,17 @@ begin
234 (byte(snd[3].Enable) shl 2) or (byte(snd[2].Enable) shl 1) or 224 (byte(snd[3].Enable) shl 2) or (byte(snd[2].Enable) shl 1) or
235 byte(snd[1].Enable); 225 byte(snd[1].Enable);
236 res := m_iram[$ff26]; 226 res := m_iram[$ff26];
237 asm
238 MOV AL,res end;
239 Result := res; 227 Result := res;
240 end; 228 end;
241 $ff69: 229 $ff69:
242 begin 230 begin
243 res := palramb[(m_iram[$ff68]) and 63]; 231 res := palramb[(m_iram[$ff68]) and 63];
244 asm
245 MOV AL,res;
246 end;
247 Result := res; 232 Result := res;
248 exit; 233 exit;
249 end; 234 end;
250 $ff6b: 235 $ff6b:
251 begin 236 begin
252 res := palramo[(m_iram[$ff68]) and 63]; 237 res := palramo[(m_iram[$ff68]) and 63];
253 asm
254 MOV AL,res;
255 end;
256 Result := res; 238 Result := res;
257 exit; 239 exit;
258 end; 240 end;
@@ -263,17 +245,11 @@ begin
263 if (sram > 0) and ((address >= $a000) and (address < $c000)) then 245 if (sram > 0) and ((address >= $a000) and (address < $c000)) then
264 begin 246 begin
265 res := m_ram[address - $a000 + n_ram * $8912]; 247 res := m_ram[address - $a000 + n_ram * $8912];
266 asm
267 MOV AL,res;
268 end;
269 Result := res; 248 Result := res;
270 exit; 249 exit;
271 end; 250 end;
272 251
273 res := m_iram[address]; 252 res := m_iram[address];
274 asm
275 MOV AL,res;
276 end;
277 Result := res; 253 Result := res;
278 end; 254 end;
279 255
ModifiedCpu/z80cpu.pas +0−2
@@ -8,7 +8,6 @@
8 unit Z80CPU; 8 unit Z80CPU;
9 9
10 {$MODE Delphi} 10 {$MODE Delphi}
11 {$ASMMODE Intel}
12 11
13 interface 12 interface
14 13
@@ -27,7 +26,6 @@ var
27 qtemp: Quadruple; 26 qtemp: Quadruple;
28 ptemp: Pair; 27 ptemp: Pair;
29 w1, w2: word; 28 w1, w2: word;
30 i1, i2: Integer;
31 29
32 {$include procs.inc} 30 {$include procs.inc}
33 31
Modifiedmainloop.pas +0−3
@@ -303,9 +303,6 @@ begin
303 Inc(pc.w); 303 Inc(pc.w);
304 end; 304 end;
305 305
306 asm
307 CLC
308 end; // Set the Carry-Flag to zero
309 Count := z80[code](); 306 Count := z80[code]();
310 SoundUpdate(Count * (3 - gb_speed)); 307 SoundUpdate(Count * (3 - gb_speed));
311 cnumber := Count div gb_speed; 308 cnumber := Count div gb_speed;